The present invention relates to a method for producing a thin film semiconductor device, and a device produced by said method. In particular, it relates to such a method and a device in which an amorphous silicon layer is subject to crystallization through an annealing process at lower temperature and higher growth rate than was previously practiced.
Conventionally, a polysilicon layer for a thin film transistor is produced through the steps of disposing an amorphous silicon layer on a substrate, and crystallizing said layer through a laser annealing process or a thermal solid phase growth process. The characteristics of a crystallized polysilicon layer thus produced depend upon the method for producing said amorphous silicon layer.
Conventionally, an amorphous silicon layer is produced through a low pressure CVD process (LPCVD) or a plasma CVD process (P-CVD) with a raw material of SiH.sub.4, or Si.sub.2 H.sub.6. The characteristics of a thin film transistor using said amorphous silicon layer, or the mobility in the layer, are better when the amorphous silicon layer is produced at lower temperature, and at higher growth rate or speed of making the layer.
In comparing P-CVD with LPCVD, a P-CVD process has the disadvantage, as compared with LPCVD process, in that the former includes impurities, like oxygen, in the amorphous layer due to activation, by means of a gas including oxygen, in the reaction chamber. The former process produces an amorphous layer at lower temperature than the latter process, and therefore, it is impossible for a P-CVD process to provide a product having better characteristics than are produced by the LPCVD process (IEEE ELECTRON DEVICE LETTERS, VOL. 12, No.7, Jul. 1991 ). Further, since the process shown in that article uses high pressure oxygen to provide an oxidized layer on an amorphous silicon layer to be used as gate insulation layer, it would be possible that the layer includes more undesired oxygen.
As another prior art, JP laid open 66919/1988 patent shows a process for producing an amorphous layer by using Si.sub.2 Cl.sub.6 +SiH.sub.4, or Si.sub.2 Cl.sub.6 +Si.sub.2 H.sub.6. However, the process is not a mere thermal dissolution process, but an optical dissolution process and/or a plasma dissolution process, and therefore, the apparatus used to produce the amorphous layer is complicated, and producing cost would be high. The quality of a layer produced through said process is not shown in that publication.
Said optical dissolution process has the disadvantage that producing efficiency is low since only one substrate is placed in a vertical direction on a board holder in a heater, since the amorphous silicon layer is produced only on that portion of a substrate where light illuminates it.
Said plasma dissolution process also has the disadvantage that producing efficiency is low since only one substrate at a time is placed in a vertical direction on a board holder in a heater. Further, since the chamber must be conductive for applying voltage for producing plasma, and it is actually made of stainless steel, metal pollution is inevitable, and still further, since the gas material has an undesired etching capability, it is difficult to produce a good amorphous silicon layer through said process.